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Researchers from the Signal Processing Division, School of Electrical Engineering, Korea University, Publish Four Papers at NeurIPS 2026

관리자 2026.10.01 Views 97

▲ From left: Jaeseok Jang, Integrated M.S./Ph.D. Student; Seungmin Jeon, Integrated M.S./Ph.D. Student; Sejin Park, Ph.D. Student; Pureum Kim, Integrated M.S./Ph.D. Student; and Taehoon Kim, Postdoctoral Researcher

Four papers involving research groups led by Professors Chang-Su Kim, Seung-Won Jung, Kyong Hwan Jin, and Wonjun Hwang of the Signal Processing Division at the Korea University School of Electrical Engineering have been accepted to the Conference on Neural Information Processing Systems (NeurIPS) 2026, a premier international conference in artificial intelligence. One of the papers was conducted in collaboration with Professor Hae Beom Lee’s research group at the School of Electrical Engineering.

The accepted papers cover a broad range of topics in artificial intelligence and signal processing, including progressive image compression, scalable and efficient logic gate networks, implicit neural representations, and online test-time adaptation. Each study proposes a new methodology to address limitations of existing approaches in its respective research area.

■ Prof. Chang-Su Kim’s Research Group
Paper Title: Bound-Conditioned Latent Inference for Progressive Image Compression
First Authors: Jaeseok Jang and Seungmin Jeon, Integrated M.S./Ph.D. Students
Summary: The study is motivated by the observation that, in Tri-plane-based progressive compression, the feasible range of the original features gradually narrows as more information is transmitted. Based on this observation, the researchers propose a method that uses the range information as a condition to iteratively refine both the probability distribution required for compression and the reconstructed feature values.

■ Prof. Seung-Won Jung’s Research Group
Paper Title: Overcoming Kernel Redundancy for Scaling Logic Gate Networks
First Author: Sejin Park, Ph.D. Student
Summary: The study identifies that increasing the width of a Logic Gate Network can lead to redundancy among logic kernels, resulting in performance saturation. To address this issue, the researchers propose Dynamic Logic Kernel (DLK), which selects different kernel groups depending on the input, and Early-stage Dynamic Logic Kernel (EDLK), which efficiently performs dynamic selection only at the early gate level where redundancy is most concentrated. These approaches improve logic-kernel diversity and the efficiency of model scaling.

■ Joint Research Group of Profs. Hae Beom Lee and Kyong Hwan Jin
Paper Title: ProPolar: Progressive Polar Decomposition for Implicit Neural Representations
First Author: Pureum Kim, Integrated M.S./Ph.D. Student
Summary: The study introduces ProPolar, an optimizer that progressively increases the rank of the momentum subspace in accordance with the coarse-to-fine learning process of Implicit Neural Representations (INRs). The proposed method enables sharper and more accurate reconstruction than existing approaches in tasks including image fitting, super-resolution, and NeRF.

■ Prof. Wonjun Hwang’s Research Group
Paper Title: Bridging CLIP with DINO: Cross-Modal Information Maximization for Online Test-Time Adaptation
First Author: Taehoon Kim, Postdoctoral Researcher
Summary: The study addresses the Modality Bias problem, in which Vision-Language Models (VLMs) rely excessively on textual semantics under noisy conditions, potentially distorting information. To overcome this issue, the researchers propose a framework that incorporates geometric visual information from a self-supervised model to complement predictions and actively correct errors that arise during real-time optimization.

The acceptance of these four papers at NeurIPS 2026 highlights the continued research contributions of the Signal Processing Division at the Korea University School of Electrical Engineering across a broad range of AI and signal processing areas, including image compression, efficient AI models, neural representation learning, and test-time adaptation.
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